Analysis and synthesis of logic circuits

Logic analysis
Logic analysis is the creation of a truth table according to a logical scheme.
The truth table of a complex element can be compiled according to the truth tables of individual elementary elements.

Example of logical device analysis


Draw up a truth table

Logic Synthesis

Synthesis of logic circuits - compilation of logic circuits for a given truth table.

Rules of synthesis

1. The output value Q determines the number of "0" and "1", if "0" <"1", then the synthesis is carried out in rows, where Q = 0 (if "1" <"0", then Q = one)

2. Each line is implemented by one “AND” element with corresponding “NOT” elements at the inputs.

3. Device "OR", if we synthesize according to "1" "OR-NO", if we synthesize according to "0", it converts the signals to the output value Q.

Minimization using Carnot cards or using perfect disjunctive normal form (SDNF)
• Formulated structural formula
• A Carnot map is compiled for two, three, four, etc. variables
for two variables


for three variables


Boolean algebra rule set


De Morgan theorems
The addition of the sum is equal to the product of the additions of the variables



The addition of the product is equal to the sum of the additions of the variables



Example
Given: synthesize the function represented by the structural formula



We write the equation in perfect disjunctive normal form (SDNF)



Summary Scheme