Comparison of delay times at different levels of architecture. Optimization

Lecture



table that every engineer should know
how much time to get information from the first level cache? 1 nanosek
in about the same time, a com *** is executed, and the input to the processor ....

Latency comparison numbers

--------------------------

L1 cache reference 0.5 ns

Branch mispredict 5 ns

L2 cache reference 7 ns 14x L1 cache

Mutex lock / unlock 25 ns

Main memory reference 100 ns 20x L2 cache, 200x L1 cache

Compress 1K bytes with Zippy 3,000 ns

Send 1K bytes over 1 Gbps network 10,000 ns 0.01 ms

Read 4K randomly from SSD * 150,000 ns 0.15 ms

Read 1 MB sequentially from memory 250,000 ns 0.25 ms

Round trip within same datacenter 500,000 ns 0.5 ms

Read 1 MB sequentially from SSD * 1,000,000 ns 1 ms 4X memory

Disk seek 10,000,000 ns 10 ms 20x datacenter roundtrip

Read 1 MB sequentially from disk 20,000,000 ns 20 ms 80x memory, 20X SSD

Send packet CA-> Netherlands-> CA 150,000,000 ns 150 ms

Notes

-----

1 ns = 10-9 seconds

1 ms = 10-3 seconds

* Assuming ~ 1GB / sec SSD

Credit

------

By Jeff Dean: http://research.google.com/people/jeff/

Originally by Peter Norvig: http://norvig.com/21-days.html#answers

Contributions

-------------

Some updates from: https://gist.github.com/2843375

Great 'humanized' comparison version: https://gist.github.com/2843375

Visual comparison chart: http://i.imgur.com/k0t1e.png

Nice animated presentation of the data: http://prezi.com/pdkvgys-r0y6/latency-numbers-for-programmers-web-development/

Latency Numbers Every Programmer Should Know

created: 2014-09-13
updated: 2020-05-09
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Highly loaded projects. Theory of parallel computing. Supercomputers. Distributed systems

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